August 22-24, 2010 at Memorial Auditorium, Stanford University

Tutorials, Sunday, August 22, 2010

Morning Tutorial

• Introduction, Aurangzeb Khan, Citius Consulting and Dan Lenoski, Cisco
• Managing the Evolution of Flash: beyond Memory to Storage, Tony Kim Director, Technical Marketing Mobile/Flash Solution Team Lead, Samsung Semiconductor, Inc.
• Forging a Future in Memory – NewTechnologies, New Markets, New Applications, Ed Doller V.P. & Chief Memory Systems Architect Corporate Vice President,  Micron Technology, Inc.

• Status and Prospect for MRAM Technology, Dr. Saied Tehrani, Chief Operating Officer, Everspin Technologies, Inc.
• Metal Oxide RRAM as a Future Non-Volatile Memory Technology , Dr. Paul Kirsch, SEMATECH
• The Inevitable Rise of Nonvolatile Memory in Computing, Jim Handy, Founder and President, Objective Analysis
• Storage Class Memory: Technology, Systems and Applications, Dr. Richard Freitas, IBM Almaden Research Center

Afternoon Tutorial

• Introduction: Optical Interconnect, Ron Ho, Oracle and Rick Hetherington, Oracle
• Overview of silicon photonic technologies, from VCSELs to silicon nanophotonics, Dr. Ashok Krishnamoorthy, Oracle
• Case study #1: Silicon photonics in the data center, Professor Al Davis, Utah/HP Labs

• Case study #2: Silicon photonics and memories, Professor Vladimir Stojanovic, MIT
• Case study #3: Hybrid on-chip data networks, Gil Hendry, Columbia University
• Case study #4: Some design considerations, Frankie Liu, PhD, VLSI Research Group, Sun Labs, Oracle

Conference Day One, Monday, August 23, 2010

Session 1: High Performance Computing (Session chair: Bill Lynch, Huawei)

• Fermi GF100, A Graphics Processing Unit (GPU) Architecture For Compute, Tessellation, Physics, And Computational Graphics, Craig Wittenbrink, Emmett Kilgariff and Arjun Prabhu, NVIDIA
• Surviving the End of Scaling of Traditional Microprocessors in HPC, Olav Lindtjorn, Robert G. Clapp, Oliver Pell, Oskar Mencer and Michael J. Flynn from Schlumberger, Stanford University
• Harnessing the Adaptive Energy Management Features of the POWER7 chip, Michael Floyd, Bishop Brock, Malcolm Ware, Karthick Rajamani, Alan Drake, Charles Lefurgy and Lorena Pesantez, IBM

Keynote 1

• Searches originating Inside and Outside of your Head (Augmented Reality and Visual Search), Dr David Petrou, Google

Session 2: SoCS (Session Chair: Christos Kozyrakis, Stanford)

• The New Xbox 360 SoC, Rune Jensen, Microsoft Corporation
• Extensions to the ARMv7-A Architecture, David Brash, ARM
• Transcede™: Solving 4G Challenges for Pico, Micro and Macrocell Platforms, Jim Johnston, CTO, Communications Convergence Processing, Mindspeed Technolgies, Inc., Mindspeed Technologies Inc.
• GreenDroid: A Mobile Application Processor for a Future of Dark Silicon, Nathan Goulding, Jack Sampson, Ganesh Venkatesh, Saturnino Garcia, Joe Auricchio, Jonathan Babb, Michael Taylor and Steven Swanson, University of California, San Diego and Massachusetts Institute of Technology

Session 3: Networking & Data Center (Session Chair: Krste Asanovic, UC Berkeley)

• The IBM PowerEN™ Processor: 16 Power™ Cores With Hardware Acceleration, Jeffrey Brown Charlie Johnson, IBM
• Smart Memory for High Performance Network Packet Forwarding, Bill Lynch and Sailesh Kumar, Huawei Technologies, USA
• Demonstration of a High Speed 4-Channel Integrated Silicon Photonics WDM Link With Hybrid Silicon Lasers, Andrew Alduino, Intel

Panel Discussion (Chair: Forest Baskett, NEA)

Asia:Partner or competitor?

Chair: Forest Baskett, , General Partner, New Enterprise Associates

Panelists:

• Craig Barratt, President & CEO, Atheros Communications, Inc.
• Leo Li, President & CEO, Spreadtrum Communications Inc.
• Tom Malloy, SVP & Chief Software Architect, Advanced Technology Labs, Adobe Systems Inc.
• Ford Tamer, CEO, Telegent Systems, Inc.

Conference Day Two, Tuesday, August 24, 2010

Session 4: FPGAs (Session Chair: Pradeep Dubey, Intel)

• Xilinx 28nm generation programmable families, Brad Taylor, Rick Crotty, Greg Starr and Ralph Wittig, Xilinx
• Stratix V with 28Gbps Transceivers in 28nm, Dan Mansur, Altera
• 3D FPGA for Improved Density, Power and Performance, Raminda Madurawe, Tier Logic

Session 5: Interconnects (Session chair: Bill Dally, Stanford/NVIDIA)

• Silicon Photonics: Optical Connectivity at 25 Gbps and Beyond, Brian Welch, Luxtera
• ICC: An interconnect controller for the Tofu interconnect architecture, Takashi Toyoshima, Fujitsu Limited
• The IBM Hub Module in 45nm CMOS SOI: A Terabyte Interconnect Switch for High-Performance Computer Systems, Scott Clark, Baba Arimilli, Ben Drerup, Jerry Lewis, John Irish, David Krolak, Kerry Imming, Joe McDonald and Andreas Koenig, Daniel Dreps, David Siljenberg, Steve Baumgartner, Glen Wiedemeier, Jim Strom, Dan OConnor, Andrew Maki, Dhaval Sejpal, Mark Ritter, Dave Friend and Charlie Geer, IBM
• Spidergon STNoC: the technology that gives an added value to your System, Marcello Coppola, STMicroelectronics

Keynote 2: Looking at Transportation in New Ways

• What does mobility look like in the future?, Burkhard Huhnke, VWGoA, Electronics Research Lab, Palo Alto, CA

Session 6: Servers (Session Chair: Alan Smith, UC Berkeley)

• Westmere-EX: A 20 Thread Server CPU, Dheemanth Nagaraj and Sailesh Kottapalli, Intel
• Architectural Innovations in WSM-EP, Muntaquim Chowdhury, Derek Bachand, Dave Hill, Erik Hallnor, Barry Huntley, Brent Boswell and Rajesh Parthasarathy, Intel
• GS464V: A High-Performance Low-Power XPU with 512-Bit Vector Extension, Weiwu Hu and Yunji Chen, Institute of Computing Technology, Chinese Academy of Sciences

Session 7: New Processor Architectures (Session Chair: Bevan Baas, UC Davis)

• The Next-generation System z Micro-Processor, Brian Curran, IBM
• AMD “Bulldozer” Core – a new approach to multithreaded compute performance for maximum efficiency and throughput, Mike Butler, AMD
• AMD’s “Bobcat” x86 Core – Small, Efficient and Strong, Brad Burgess, AMD
• Closing Remarks